Carlos Tupaz


Education: Bachelor of Science in computer engineering (May 2016)

McNair Project: VisiBoole, A KSU HDL; implementing subdesigns and unidirectional language translation (2015)

Mentor: John Devore, Ph.D.

VisiBoole is a program, which is being used in Kansas State University, designed to simulate digital logic circuits by taking user-inputted Boolean expressions and converting it to color coded clickable text. VisiBoole allows a user to work with complex projects without programming hardware. The drawback to interactive text is that keeping excessive lines of text in a single window requires a scroll bar to traverse. To overcome this, I implemented subdesigns in VisiBoole which will let a user compact multiple smaller designs inside their main design and view each subdesign in its own form. Lastly, while VisiBoole can simulate a circuit, it cannot program hardware. Other HDLs such as VHDL, Verilog, and AHDL can be used to program hardware. To produce the same result of programming hardware, I implemented language translation from VisiBoole's language to AHDL.